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ir2010(s)pbf 1 www.irf.co m ? 201 5 international rectifier april 14, 2015 high and low side driver ordering information features ? floating channel designed for bootstrap operation ? fully operational to 2 00v ? tolerant to negative transient voltage , d v/dt immune ? gate drive supply range from 10 to 20v ? un dervoltage lockout for both channels ? 3.3v logic compatible ? separate logic supply range from 3.3v to 20v ? logic and power ground +/ - 5v offset ? cmos schmitt - triggered inputs with pull - down ? shut down input turns off both channels ? cross - conduction prevention log ic ? matched propagation delay for both channels ? outputs in phase with inputs description the ir2010 is a high power, high voltage, high speed power mosfet and igbt driver with independent high and low side referen ced output channels. logic inputs are comp atible with standard cmos or lsttl output, down to 3.0v logic. the output drivers feature a high pulse current buffer stage designed for minimum driver cross - conduction. propagation delays are matched to simplify use in high frequency applications. the flo ating channel can be used to drive an n - channel power mosfet or igbt in the high side configuration which operates up to 200 volts. proprietary hvic and latch immune cmos technologies enable ruggedized monolithic construction. applications ? converters ? dc motor drive product summary v offset (max) 2 00v i o +/ - (typ) 3.0a / 3.0 a v out 10 C 20v t on/off (typ ) delay matching (max) 95ns & 65 ns 15ns package options 14 - lead pdip 16 - lead soic wide body base part number package type standard pack orderable part number form quantity ir2010pbf pdip14 tube 25 ir2010pbf ir2010spbf so 16w t ube 45 ir2010spbf ir2010spbf so16w tape and reel 1000 ir2010strpbf
ir2010(s)pbf 2 www.irf.com ? 201 5 international rectifier april 14, 2015 typical connection diagram (refer to lead assignments for correct configuration.) this diagram shows electrical connections only. please refer to our ap plication notes and design ti ps for proper circuit board layout s d l i n v s s v c c l o v s s h i n v d d t o l o a d c o m 2 0 0 v v b h o v s h i n v d d s d l i n v c c
ir2010(s)pbf 3 www.irf.com ? 201 5 international rectifier april 14, 2015 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to com . the thermal resistance and powe r dissipation ratings are measured under board mounted and still air conditions. symbol definition min. max. units v b high side floating supply voltage - 0.3 225 v v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high s ide floating output voltage v s - 0.3 v b + 0.3 v cc low side fixed supply voltage - 0.3 25 v lo low side output voltage - 0.3 v cc + 0.3 v dd logic supply voltage - 0.3 v ss + 25 v ss logic supply offset voltage v cc - 25 v cc + 0.3 v in logic inp ut voltage ( hin, lin & sd ) v s s - 0.3 v dd + 0.3 dv s /dt allowable offset supply voltage transient (figure 2) 50 v/ns p d package power dissipation @ t a +25c 14 - lead pdip 1.6 w 16 - lead soic 1.25 rth ja thermal resistance, junction to ambient 14 - lead pdip 75 c/w 16 - lead soi c 100 t j junction temperature 150 c t s storage temperature - 55 150 t l lead temperature (solde ring, 10 seconds) 300 recommended operating conditions the input/output logic timing diagram is shown in figure 1. f or proper operation the d evice should be used within the recommended conditions. the v s and v ss offset rating is tested with all supplies biased at 15v differential. typical ratings at other bias conditions are shown in figures 2 4 and 25. symbol definition min. max. units v b high side floating supply absolute voltage v s + 10 v s + 20 v v s high side floating supply o ffset voltage ? 2 00 v ho high side floating output voltage v s v b v cc low side fixed supply voltage 10 20 v lo low side output voltage 0 v cc v dd logic supply voltage v s s + 3 v s s + 20 v ss logic supply offset voltage - 5 ?? 5 v in logic i nput voltage (hin, lin, & sd) v s s v dd t a ambient temperature - 40 125 c ? logic operational for v s of - 4 to +2 00v. logic state held for v s of - 4 v to - v bs . ?? when v dd < 5v, the minimum v ss offset is limited to - v dd (please refer to the design tip dt97 - 3 for more details).
ir2010(s)pbf 4 www.irf.com ? 201 5 international rectifier april 14, 2015 dynamic electrical characteristics v bias (v cc , v bs , v dd ) = 15v, c l = 1000 pf and t a = 25c and v ss = com unless otherwise specified. the dynamic electrical characteristics are measured using the test circuit shown in f igu re 3. symbol definition figure min. typ. max. units test conditions t on turn - on propagation delay 7 50 95 135 ns v s = 0v t off turn - off propagation delay 8 30 65 105 v s = 200v t sd shutdown propagation delay 9 35 70 105 t r turn - on ri se time 10 10 20 t f turn - off fall time 11 15 25 mt delay matching, hs & ls turn - on/off 6 15 static electrical characteristics v bias (v cc , v bs , v dd ) = 15v and t a = 25c and v ss = com unless otherwise specified. the v in , v th and i in parameters are referenced to v ss and are applicable to all three logic input leads: hin, lin and sd . the v o and i o parameters are referenced to com and are applicable to the respective output leads: ho o r lo . symbol definition figure min. typ. m ax. units test conditions v ih logic 1 input voltage 12 9.5 v v dd = 15v v il logic 0 input voltage 13 6.0 v ih logic 1 input voltage 12 2 v dd = 3.3v v il logic 0 input voltage 13 1 v oh high level output voltag e, v bias - v o 14 1. 0 i o = 0a v ol low level output voltage, v o 15 0.1 i lk offset supply leakage current 16 50 a v b = v s = 2 00v i qbs quiescent v bs supply current 17 70 210 v in = 0v or v dd i qcc quiescent v cc supply current 18 100 230 i qdd quiescent v dd supply current 19 1 5 i in+ logic 1 input bias current 20 20 40 v in = v dd i in - logic 0 input bias current 21 1.0 v in = 0v v bsuv+ v bs supply undervoltage positive going threshold 22 7.5 8.6 9.7 v v bsuv - v bs supply undervoltage negative going threshold 23 7.0 8.2 9.4 v ccuv+ v cc supply undervoltage positive going threshold 24 7.5 8.6 9.7 v ccuv - v cc supply undervoltage negative going threshold 25 7.0 8.2 9.4 i o+ output high short circuit pulsed current 26 2.5 3.0 a v o = 0v, v in = v dd pw 10 s i o - output low short circuit pulsed current 27 2.5 3.0 v o = 15v, v in = 0v pw 10 s
ir2010(s)pbf 5 www.irf.com ? 201 5 international rectifier april 14, 2015 functional block diagram
ir2010(s)pbf 6 www.irf.com ? 201 5 international rectifier april 14, 2015 lead definitions symbol description v dd logic supply h in logic input for high side gate driver outputs (ho), in phase sd logic input for shutdown lin logic input for low side gate driver ou tputs (l o), in phase v ss logic ground v b high side floating supply ho high side gate drive output v s high side floating supply retu rn v cc low side supply lo low side gate drive output com low side return lead assignments 14 - lead pdip 16 - lead soic (wide body)
ir2010(s)pbf 7 www.irf.com ? 201 5 international rectifier april 14, 2015 application information and additional details figure 1. input/output timing diagram figure 2. floating supply voltage transient test circuit figure 3. switching time test circuit figure 4. switching time waveform def inition figure 5. shutdown waveform definitions figure 6. delay matching waveform definitions h i n l i n s d h o l o h o 1 0 k f 6 0 . 1 f h i n l i n v s s l o v d d h o v c c = 1 5 v 1 0 f v c c v b v s o u t p u t m o n i t o r s d c o m 1 0 0 f h v = 1 0 t o 2 0 0 v 0 . 1 f + 1 0 k f 6 2 0 0 h 1 0 k f 6 d v s d t < 5 0 v / n s i r f 8 2 0 c l v b h i n h o l i n 0 . 1 f 0 . 1 f h i n l i n v s s l o v d d h o v c c = 1 5 v c l 1 0 f v c c v b 1 0 f v s v s + - 1 5 v l o s d s d c o m 1 0 f ( 0 t o 2 0 0 v ) h o l o 5 0 % 5 0 % 1 0 % 1 0 % 9 0 % 9 0 % t o n t r t o f f t f h i n l i n h o l o s d 5 0 % t s d 9 0 % 5 0 % 5 0 % 1 0 % 9 0 % h i n l i n m t l o h o m t l o h o
ir2010(s)pbf 8 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 7a. turn - on time vs. temperature figure 7b. turn - on time vs. v cc /v bs voltage figure 7c . turn - on time vs. v dd voltage figure 8a. turn - off time vs. temperature figure 8b. turn - off time vs . v cc /v bs voltage figure 8c. turn - off time vs. v dd voltage
ir2010(s)pbf 9 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 9a. shutdown time vs. temperature figure 9b. shutdown ti me vs. v cc /v bs voltage figure 9c. shutdown time vs. v dd voltage figure 10a. turn - on rise time vs. temperature figure 10b. turn - on rise time vs. v bias (v cc =v bs =v dd ) voltage figure 11a. turn - off fall time vs. temperature
ir2010(s)pbf 10 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 11b. turn - off fall time vs. v bias (v cc =v bs =v dd ) voltage figure 12a. logic 1 input threshold vs. temperature figure 12b. logic 1 input threshold vs. v dd voltage figure 13a. logic 0 input threshold vs. temperature figure 13b. logic 0 in put threshold vs. v dd voltage figure 14a. high level output vs. temperature
ir2010(s)pbf 11 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 14b. high level output vs. v bias voltage figure 15a. low level output vs. temperature figure 15b. low level output vs. v bias voltage figure 16a. offset supp ly current vs. temperature figure 16b. offset supply current vs. offset voltage figure 17a. v bs supply current vs. temperature
ir2010(s)pbf 12 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 17b. v bs supply current vs. v bs voltage figure 18a. v cc supply current vs. temperature figure 18b. v cc supply current vs. v cc voltage figure 19a. v dd supply current vs. temperature figure 19b. v dd supply current vs. v dd voltage figure 20a. logic 1input current vs. temperature
ir2010(s)pbf 13 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 20b. logic 1 input current vs. v dd voltage fig ure 21a. logic 0 input current vs. temperature figure 21b. logic 0 input current vs. v dd voltage figure 22. v bs undervoltage (+) vs. temperature figure 23. v bs undervoltage ( - ) vs. temperature figure 24. v cc undervoltage (+) vs. tempera ture
ir2010(s)pbf 14 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 25. v cc undervoltage ( - ) vs. temperature figure 26a. output source current vs. temperature figure 26b. output source current vs. v bias voltage figure 27a. output sink current vs. temperature figure 27b. output sink curren t vs. v bias voltage figure 28. ir2010 tj vs. frequency r gate = 10?, v cc = 15v with irfpe50
ir2010(s)pbf 15 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 29. ir2010 tj vs. frequency r gate = 16?, v cc = 15v with irfbc40 figure 30. ir2010 tj vs. frequency r gate = 22?, v cc = 15v with irfbc 30 figure 31. ir2010 tj vs. frequency r gate = 33?, v cc = 15v with irfbc20 figure 32. ir2010 tj vs. frequency r gate = 10?, v cc = 15v with irfbe50
ir2010(s)pbf 16 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 33. ir2010 s tj vs. frequency r gate = 16?, v cc = 15v w ith irfbc40 figure 34. ir2010 s tj vs. frequency r gate = 22?, v cc = 15v with irfbc30 figure 35. ir2010 s tj vs. frequency r gate = 33?, v cc = 15v with irfbc20
ir2010(s)pbf 17 www.irf.com ? 201 5 international rectifier april 14, 2015 package details
ir2010(s)pbf 18 www.irf.com ? 201 5 international rectifier april 14, 2015 tape and reel details e f a c d g a b h note : controlling dim ension in m m loaded tape feed direction a h f e g d b c carrier tape dimension for 16soicw code min max min max a 11.90 12.10 0.468 0.476 b 3.90 4.10 0.153 0.161 c 15.70 16.30 0.618 0.641 d 7.40 7.60 0.291 0.299 e 10.80 11.00 0.425 0.433 f 10.60 10.80 0.417 0.425 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 metric imperial reel dimensions for 16soicw code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 22.40 n/a 0.881 g 18.50 21.10 0.728 0.830 h 16.40 18.40 0.645 0.724 metric imperial
ir2010(s)pbf 19 www.irf.com ? 201 5 international rectifier april 14, 2015 part marking information i r x x x x x i r l o g o y w w ? p a r t n u m b e r d a t e c o d e p i n 1 i d e n t i f i e r l o t c o d e ( p r o d m o d e C 4 d i g i t s p n c o d e ) a s s e m b l y s i t e c o d e p e r s c o p 2 0 0 - 0 0 2 ? x x x x m a r k i n g c o d e l e a d f r e e r e l e a s e d n o n - l e a d f r e e r e l e a s e d ? p
ir2010(s)pbf 20 www.irf.com ? 201 5 international rectifier april 14, 2015 qualification information ? qualification level industrial ?? (per jedec jesd 47 ) comments: this family of ics has passed jedecs industrial qualification. irs consumer qualification level is granted by extension of the higher industrial level. moisture sensitivity level 16 - lead soic wb msl 3 ??? (per ipc/jedec j - std - 020) rohs compliant yes ? qualification standards can be found at international rectifiers web site http://www.irf.com/ ?? higher qualification ratings may be available should the user have such requirements. please contact your international rectifier sales representative for further information. ??? higher msl rat ings may be available for the specific package types listed here. please contact your international rectifier sales representative for further information. the information provided in this document is believed to be accurate and reliable. however, international rectifier assumes no responsibility for the consequences of the use of this information. international rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may resu lt from the use of this information. no license is granted by implication or otherwise under any patent or patent rights of international rectifier. the specifications mentioned in this document are subject to change with out notice. this document supers edes and replaces all information previously supplied. for technical support, please contact irs technical assistance center world headquarters: 233 kansas st., e l segundo, california 90245 tel: (310) 252 - 7105

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